1. Field of the Invention
The disclosed invention relates to solid-state image sensors and more specifically to small pixel size junction gate BCMD image sensors that can be used in the back side illuminated mode as well as in the front side illuminated mode and which incorporate a vertical charge reset to the gate.
2. Description of Related Art
The typical image sensors sense light by converting impinging photons into electrons that are integrated (collected) in sensor pixels. After completion of the integration cycle collected charge is converted into a voltage, which is supplied to the output terminals of the sensor. In CMOS image sensors the charge to voltage conversion is accomplished directly in the pixels themselves and the analog pixel voltage is transferred to the output terminals through various pixel addressing and scanning schemes. The analog signal can also be converted on-chip to a digital equivalent before reaching the chip output. The pixels have incorporated in them a buffer amplifier, typically a Source Follower (SF), which drives the sense lines that are connected to the pixels by suitable addressing transistors. After charge to voltage conversion is completed and the resulting signal transferred out from the pixels, the pixels are reset in order to be ready for accumulation of new charge. In pixels that are using Floating Diffusion (FD) as the charge detection node, the reset is accomplished by turning on a reset transistor that conductively connects the FD node to a voltage reference, which is typically the pixel drain node. This step removes collected charge. However, it generates kTC-reset noise as is well known in the art. kTC noise has to be removed from the signal by the Correlated Double Sampling (CDS) signal processing technique in order to achieve the desired low noise performance. The typical CMOS sensors that utilize the CDS concept usually require four transistors (4T) in each pixel. An example of the 4T pixel circuit with pinned photodiode can be found in U.S. Pat. No. 5,625,210 to Lee, which patent is incorporated herein by reference.
In modem CMOS sensor designs the circuitry for several photodiodes may be shared as can be found for example in U.S. Pat. No. 6,657,665 B1 to Guidash. In this patent the pixel consists of two photodiodes located in neighboring rows that share the same circuitry. Such shared circuit concept can result in having only two metal bus lines in the row direction and two metal bus lines in the column direction per photodiode as shown in FIG. 1. This is very useful for designing small pixels or pixels with high Fill Factor (FF) since the spacing and the width of the metal lines essentially determines the minimum pixel size. This is also illustrated in FIG. 1, where the drawing 100 represents the schematic diagram of a shared pixel circuit with two photodiodes 107 and 108. The photodiodes are coupled through charge transfer transistors 109 and 110 respectively to the common FD charge detection node 115. The FD node 115 is connected to the gate of the SF transistor 112 whose drain is connected via line 116 to the Vdd column bus line 101. The source of the SF transistor 112 is connected via the address transistor 113 and the line 117 to the output signal column bus line 102. The FD node is reset by the reset transistor 111 and its drain is connected to line 116. The control signals to the address transistor 113, the reset transistor 111, and charge transfer transistors 109 and 110 are supplied by the row bus lines 114, 106, 104 and 105 respectively. As can be seen from the schematic diagram of FIG. 1 the circuit that has two photodiodes thus consists of two row bus lines and two column bus lines per photodiode. However, in many cases it is also necessary to provide an additional connection between the elements of the circuit in the column direction as is illustrated by the wire 103. This further reduces the pixel Fill Factor (FF).
The large number of transistors in a pixel reduces the pixel charge storage capacity and also the quantum efficiency of photon conversion to electrons. It is therefore desirable to illuminate the sensor pixels from the back side of the substrate where no wiring is obstructing the illuminating light. However, the pixel well capacity, and thus its capability to store electrons, is still reduced when a larger number of transistors are used in the pixel. One advantage of using the BCMD concept is that only one MOS transistor is used for the pixel addressing, charge sensing including the signal buffering, and charge reset. A description of the BCMD concept can be found in U.S. Pat. No. 5,424,223 and U.S. Pat. No. 4,901,129 both to Hynecek, also incorporated herein by reference. In the BCMD pixel concept charge is stored under the MOS transistor channel and modulates the transistor threshold. The change in the threshold voltage is sensed when a current is directed to flow through this transistor. After charge sensing has been completed the pixel needs to be reset by removing collected charge without generating kTC noise. In the original MOS gate single transistor BCMD concept charge was removed from the pixel in a vertical direction to a silicon bulk by a suitable BCMD transistor gate bias. However, for the back side illuminated sensor configuration this vertical reset to bulk is a disadvantage, since the light sensitivity is reduced. The BCMD pixel using additional reset structure to provide charge reset in a lateral (horizontal) direction has been developed previously, which has an advantage in BSI applications. The BCMD lateral reset removes charge from the pixel completely without kTC noise generation, which is another advantage of this concept. The lateral reset is described in more detail in the above mentioned U.S. Pat. No. 5,424,223 to Hynecek. Unfortunately the pixel structure described in this patent increases the pixel size, which is a disadvantage when small pixels are needed for high resolution image sensors.
For this reason a different BCMD transistor and its reset concept is necessary that minimizes the pixel size while at the same time preserving all the advantages of the original BCMD device.